HomeSACAI-aligned Grade 12 Information Technology (IT) Study Guide
SACAI MATRIC CURRICULUM · GRADES 10–12
Grade 12 Information Technology (IT) Study Overview
Authoritative preparation for SACAI IT Paper 1 (Practical Software Development: Java/Delphi OOP, SQL queries, Text Files) and Paper 2 (Theory: CPU Pipelining, Caching, 1NF/2NF/3NF Normalization, Networks & POPIA).
1. Paper 1 Practical: Object-Oriented Programming (OOP) Class Architecture
Question 3 in Paper 1 requires writing a custom class and consuming it in a GUI application. Examiners grade against strict OOP principles:
// JAVA STANDARD OOP CLASS IMPLEMENTATION
public class LearnerAccount {
// 1. Private Instance Attributes (Encapsulation)
private String idNumber;
private String fullName;
private double balanceDue;
private boolean isRegistered;
// 2. Parameterised Constructor
public LearnerAccount(String idNumber, String fullName, double balanceDue) {
this.idNumber = idNumber;
this.fullName = fullName;
this.balanceDue = balanceDue;
this.isRegistered = true;
}
// 3. Accessor (Getter) Methods
public String getFullName() { return fullName; }
public double getBalanceDue() { return balanceDue; }
// 4. Mutator (Setter) / Business Logic Method
public void makePayment(double paymentAmount) {
if (paymentAmount > 0) {
this.balanceDue -= paymentAmount;
}
}
// 5. toString Method for UI Formatting
public String toString() {
return String.format("ID: %s | Name: %-20s | Balance: R%.2f",
idNumber, fullName, balanceDue);
}
}
Exam Warning Common OOP Coding Deductions
- Never make attributes public: Attributes must be declared
privateto maintain data encapsulation. - Check for NullPointerException: When looping through an array of objects (e.g.
LearnerAccount[] learners = new LearnerAccount[100];), always verifylearners[i] != nullbefore accessing methods.
2. High-Yield SQL Queries for SACAI Paper 1 & Paper 2
Database questions test your ability to query relational tables accurately using standard SQL syntax.
-- 1. Filter, Aggregate, and Group by Province
SELECT Province, COUNT(CandidateID) AS TotalCandidates,
AVG(FinalMark) AS AverageMark
FROM tblCandidates
WHERE ExaminationYear = 2025
GROUP BY Province
HAVING AVG(FinalMark) >= 60.0
ORDER BY AverageMark DESC;
-- 2. Inner Join between Candidates and Subjects
SELECT c.CandidateID, c.Surname, s.SubjectName, s.PaperCode
FROM tblCandidates c
INNER JOIN tblRegistrations r ON c.CandidateID = r.CandidateID
INNER JOIN tblSubjects s ON r.SubjectID = s.SubjectID
WHERE s.IsActive = True;
3. Paper 2 Theory: The 3 Stages of Database Normalization (1NF, 2NF, 3NF)
Database normalization eliminates data redundancy and avoids anomalies (Insertion, Deletion, and Update anomalies).
| Normal Form | Core Rule | How to Resolve into This Form |
|---|---|---|
| First Normal Form (1NF) | Each field must contain only atomic (indivisible) values and there must be no repeating groups. A primary key must uniquely identify each record. | Split multivalued fields (e.g. "Maths, Science" in one column) into separate rows or linked tables. Ensure a valid primary key. |
| Second Normal Form (2NF) | The table must already be in 1NF, and no partial dependencies may exist. (Non-key attributes cannot depend on only part of a composite primary key). | Move attributes that depend on only part of the composite key into a separate table with their own primary key. (Only applies to composite keys). |
| Third Normal Form (3NF) | The table must already be in 2NF, and no transitive dependencies may exist. (Non-key attributes cannot depend on other non-key attributes). | Move the transitive non-key attributes into a separate reference table (e.g. move PostalCode and Suburb to a separate tblPostalCodes). |
4. Computer Architecture: CPU Caching & Pipelining
In Paper 2 Systems Technologies, examiners test hardware performance bottlenecks:
- Fetch-Execute Cycle: The CPU fetches an instruction from RAM via the data bus, decodes it in the Control Unit (CU), executes it in the Arithmetic Logic Unit (ALU), and stores the result back in registers or cache.
- Cache Hierarchy:
- L1 Cache: Smallest ($32\text{ KB} - 64\text{ KB}$ per core), located directly on the CPU die, runs at full CPU clock speed (fastest access, ~1 ns).
- L2 Cache: Medium size ($512\text{ KB} - 2\text{ MB}$ per core), slightly slower than L1.
- L3 Cache: Shared across all CPU cores ($16\text{ MB} - 64\text{ MB}$), dramatically reduces RAM latency bottlenecks.
- Instruction Pipelining: Overlapping stages of multiple instructions so the CPU processes fetch, decode, and execute concurrently rather than waiting for each instruction to complete sequentially.